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Item

Who

Notes

IM-D


AdministrativeNigel / Kam
  • Virtual meetings next week 6:00 -7:00 ET (No adminstrative topics. Will leap directly into the technical topics.)
    • Dec. 10 Tuesday
      • Model structure (#13, TR-512.A.2), including aggregate and bounded context (Chris, Nigel)
    • Dec. 11 Wednesday
      • Party model (#29, TR-512.13) (Chris)
      • Location model (#30, TR-512.14)(Chris)
      • OAM in core model (Andrea)
    • Dec. 12 Thursday
      • Operation pattern (#43, TR-512.10) and Streaming model (#65, TR-512.10), restructured into TAPI, control construct (Nigel) 
  • TR-512 v1.4.1:  Up-version the modeling tool. No change to the model.
    • Current status
      • The Core model UML has been migrated to Eclipse 4.9.0 (2018.09) & Papyrus 4.1.0
      • All the UML diagrams has been fixed. They are now readable and snap to grid
        • They are being double checked
      • Aim to release TR-512 v1.4.1 in December 
  • Future calls and meetings 
    • Virtual meetings:
      • 2019 December 10, 11, & 12:
      • 2020 April 13 06:00-09:00 US Eastern Time
        • Agenda plan: TBD
    • Face-to-Face:
      • 2020 Jun 8 - 12: Face-to-Face in Madrid hosted by Telefonica
      • Agenda plan: TBD
  • Resilience
    • To be discussed in normal weekly calls
VNFMalcolm
  • Issues with using ProcessingConstruct as VNF
    • Concern that in the ETSI model, the VNF and PNF are modeled separately. 
    • VNF and PNF are functions. The latter is just associated more directly to physical stuff, e.g., ASIC.
    • In the Core model, we describe an abstraction of the function, using ProcessConstruct (PC). PC models functions that are not explicitly modeled using ForwardingConstruct, LTP, and ControlConstruct. At the logical level, the function can be supported in physical or virtual machine level. The physical aspects can be navigated through the associate equipment model. 
  •  Malcolm Betts To describe the relationship between the logical model and the physical implementation (e.g. ASIC, FPGA, VM, etc.), including discussion of expression of capability. Aim for text for TR-512.A.2
    A lot of this is already in TR-512.12_OnfCoreIm-Software and TR-512.A.13_OnfCoreIm-Appendix-SoftwareExamples which already has a FPGA example.
ResilienceAndrea
  • Work item #6 Resilience examples (as called for by TAPI) 
    • otcc2019.AM.004-Resiliency.pptx
    • Jonathan: Can/how one know the status of a restoration route?
      • Answer in short: Use the core model lifecycle state, e.g., Potential available, potential busy, 
Future call topicsAll

Dec. 10, 11, 12: virtual meeting. See topics above.

Dec. 19: 2020 work plan; Review description (for TR-512.A.2) of relationship between Logical model & physical implementaion

No OIMT calls on December 26th and January 2nd. 

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